A Dynamic Priority Based Arbitration Algorithm
Sandra Mohan1, Anish Joseph2

1Mrs. Sandra Mohan, Department of Electronics and Communication Engineering, Sree Buddha College of Engineering, Alappuzha (Kerala), India.
2Mr. Anish Joseph, Technical Staff Engineer, DSipher Design Solutions Pvt Ltd, Bangalore (Karnataka), India.
Manuscript received on 11 June 2013 | Revised Manuscript received on 17 June 2013 | Manuscript Published on 30 June 2013 | PP: 232-234 | Volume-3 Issue-1, June 2013 | Retrieval Number: A0932063113/13©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: Today’s electronic industry consists of chips with multimillion gates. This new level of integration on a single chip is called the System on Chip (SoC) design. In an SoC, on-chip interconnection networks are mostly implemented using buses. The performance of the SoC design heavily depends upon the efficiency of its bus structure. The bus used in the SoC platform requires an arbitration process since multiple components connected to it can act as masters and hence initiate a transaction. As the number of system components in SoC design increases, it becomes that an efficient arbiter is one of the most critical factors for high system performance. This paper deals with an Advanced High-performance Bus (AHB) arbiter with a dynamic arbitration mechanism.
Keywords: AHB, AMBA, Arbiter, SoC.

Scope of the Article: Algorithm Engineering