5b324525-ba5f-4296-88c3-fa363d511c62 beie director@blueeyesintelligence.org 10.35940/ijitee.D1066.14050425 10.1109/IDT.2016.7843036Aseeri M A S,Alasows A A,Ahmad M R(2016). Design of DRFM system based on FPGA with high resources[C].Design & Test Symposium (IDT),2016 11th International. IEEE: DOI: https://doi.org/10.1109/IDT.2016.784303610.3390/s140100416MAGDALENO E,RODRÍGUEZ M,PÉREZ F,et al(2013). A FPGA embedded web server for remote monitoring and control of smart sensors networks [J]. sensors,14(1): 416-430. DOI: https://doi.org/10.3390/s14010041610.1007/s00521-018-3761-1Mittal, S.. (2018). A survey of fpga-based accelerators for convolutional neural networks. Neural Computing and Applications. DOI: https://doi.org/10.1007/s00521-018-3761-110.3390/electronics13173504Zhao, L. . (2024). A scalable multi-fpga platform for hybrid intelligent optimization algorithms. Electronics, 13. DOI: https://doi.org/10.3390/electronics1317350410.1109/TCSII.2018.2865896Bai, L. , Zhao, Y. , & Huang, X. . (2018). A cnn accelerator on fpga using depthwise separable convolution. Circuits and Systems II: Express Briefs, IEEE Transactions on, PP(99), 1-1. DOI: https://doi.org/10.1109/TCSII.2018.286589610.1002/cta.3075Gholami, M. , Farsa, E. Z. , & Karimi, G. . (2021). Reconfigurable field-programmable gate array-based on-chip learning neuromorphic digital implementation for nonlinear function approximation. International Journal of Circuit Theory and Applications. DOI: https://doi.org/10.1002/cta.307510.3390/jlpea11010007Sahoo S S, Ranjbar B, Kumar A(2021). Reliability-Aware Resource Management in Multi-/Many-Core Systems: A Perspective Paper[J]. Journal of Low Power Electronics and Applications, 2021, 1 1(1). DOI: https://doi.org/10.3390/jlpea1101000710.1007/s11432-017-9290-4Li X, Yan G, Ye J, et al(2018). Fault tolerance on-chip: a reliable computing paradigm using self-test, self-diagnosis, and self-repair10.1007/s11432-017-9290-4(3S) approach[J]. Science China Information Sciences, 2018, 61(1 1): 1-17. DOI: https://doi.org/10.1007/s11432-017-9290-410.1109/JPROC.2015.2404212Wirthlin, M. . (2015). High-reliability fpga-based systems: space, high-energy physics, and beyond. Proceedings of the IEEE, 103(3), 379-389. DOI: https://doi.org/10.1109/JPROC.2015.240421210.1109/ETS.2013.6569377Reorda, M. S. , Sterpone, L. , & Ullah, A. . (2013). An error-detection and self-repairing method for dynamically and partially reconfigurable systems. IEEE. DOI: https://doi.org/10.1109/ETS.2013.656937710.1142/S0218126612400117Lee, J. , Bhagavatula, S. , Bhunia, S. , Roy, K. , & Jung, B. . (2012). Self-healing design in deep scaled cmos technologies. Journal of Circuits Systems & Computers, 21(06), 1240011-1240011-15. DOI: https://doi.org/10.1142/S021812661240011710.1109/AHS.2010.5546231Narasimhan S, Paul S, Chakraborty R S, et al(2010). System level self-healing for parametric yield and reliability improvement under power bound[C]//2010 NASA/ESA Conference on Adaptive Hardware and Systems. IEEE, 2010: 52-58. DOI: https://doi.org/10.1109/AHS.2010.554623110.1002/adfm.202308219Huang, X. , Zhao, Y. , Wang, X. , Wang, F. , Liu, L. , & Yang, H. , et al. (2024). Implementing versatile programmable logic functions using two magnetization switching types in a single device. Advanced Functional Materials, 34(3). DOI: https://doi.org/10.1002/adfm.20230821910.4218/etrij.15.0115.0040Ilwoong, Kim, Woosik, Jeong, Dongho, & Kang, et al. (2015). Fully programmable memory bist for commodity drams. ETRI Journal, 37(4), 787-792. DOI: https://doi.org/10.4218/etrij.15.0115.0040 010.1109/ISCAS.2018.8351501Yuan, C. , Huang, L. , Wang, J. , & Li, Q. . (2018). Micro-architecture design for low overhead fault tolerant network-on-chip. IEEE. DOI: https://doi.org/10.1109/ISCAS.2018.835150110.1109/AHS.2014.6880155Liu, J. , Harkin, J. , Yuhua, L. , & Maguire, L. P. . (2014). Online fault detection for networks-on-chip interconnect. IEEE. DOI: https://doi.org/10.1109/AHS.2014.6880155Wang J, Ebrahimi M, Huang L, et al(2019). Efficient design-for-test approach for networks-on-chip[J]. IEEE Transactions on Computers, 68(2): 198-213. https://ieeexplore.ieee.org/document/844073110.1109/ISCAS.2019.8702409Zhan J, Huang L, Wang J, et al(2019). Online path-based test method for network-on-chip[C]//2019 .IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2019: 1-5. DOI: https://doi.org/10.1109/ISCAS.2019.870240910.1109/TPDS.2016.2521641Pavan, Poluri, Ahmed, & Louri. (2016). Shield: a reliable network-on-chip router architecture for chip multiprocessors. IEEE Transactions on Parallel and Distributed Systems, 27(10), 3058-3070. DOI: https://doi.org/10.1109/TPDS.2016.252164110.1145/3193827Vip in K, Fahmy S A(2018). FPGA dynamic and partial reconfiguration: A survey of architectures, methods, and applications[J]. ACM Computing Surveys (CSUR),5 1(4): 1-39. DOI: https://doi.org/10.1145/319382710.1109/iThings-GreenCom-CPSCom-SmartData.2016.44Lee, Y. H. , & Nair, S. . (2017). A Smart Gateway Framework for IOT Services. IEEE International Conference on Internet of Things. IEEE. pp. 107-114. DOI: https://doi.org/10.1109/iThings-GreenCom-CPSCom-SmartData.2016.4410.1109/JIOT.2016.2550561Jutila M(2016). An Adaptive Edge Router Enabling Internet of Things[J]. Internet of Things Journal, IEEE, 2016, 3(6):1061-1069. DOI: https://doi.org/10.1109/JIOT.2016.2550561N arayanan R, Murthy C(2017). A probabilistic framework for protocol conversions in IoT networks with heterogeneous gateways[J]. IEEE Communications Letters, 2017:1-1. https://ieeexplore.ieee.org/document/799013810.1109/JIOT.2022.3188826L. Yang, Y. Wei, F. R. Yu and Z. Han(2022),Joint Routing and Scheduling Optimization in Time-Sensitive Networks Using Graph-Convolutional-Network-Based Deep Reinforcement Learning, in IEEE Internet of Things Journal, vol. 9, no. 23, pp. 23981-23994, 1 Dec.1, 2022, DOI: https://doi.org/10.1109/JIOT.2022.318882610.3390/s19194217Akasiadis, C. , Pitsilis, V. , & Spyropoulos, C. D. . (2019). A multi-protocol iot platform based on open-source frameworks. Sensors, 19(19), 4217-. DOI: https://doi.org/10.3390/s19194217Song Xin(2020). Design and Implementation of Industrial Internet Gateway Based on Microservice Architecture [D]. Beijing Jiaotong University. https://cdmd.cnki.com.cn/Article/CDMD-10056-1021826347.htm10.1109/ICCASIT50869.2020.9368773Zhang, Y. , Sun, W. , & Shi, Y. . (2020). Architecture and implementation of industrial internet of things (iiot) gateway. IEEE. DOI: https://doi.org/10.1109/ICCASIT50869.2020.9368773Sun Xihao, Li Yimin, Hua Jing, etc(2007). Type-2 mathematical model for redundant structures in biological systems [J]. Fuzzy systems and mathematics, 21(5):8. https://0.3969/j.issn.1001-7402.2007.05.02810.1109/91.873577Liang Q，Mendel J M(2001)．Interval type-2 fuzzy logic system：theory and design［J］．IEEE Trans．Fuzzy systems，2001 ，132：195～220. DOI: http://dx.doi.org/10.1109/91.87357710.35940/ijitee.J9478.0881019Dwivedi, P. K., & Tripathi, S. P. (2019). A Simplified Interval Type-2 Fuzzy Implementation for Financial Credit Decision. In International Journal of Innovative Technology and Exploring Engineering (Vol. 8, Issue 10, pp. 3036-3044). DOI: https://doi.org/10.35940/ijitee.j9478.088101910.35940/ijeat.A4299.1013123Usman, H., & Magaji, N. (2023). Interval Type - 2 Fuzzy Logic Controller Based Shunt Active Power Filter for Power Quality Enhencement. In International Journal of Engineering and Advanced Technology (Vol. 13, Issue 1, pp. 68-73). DOI: https://doi.org/10.35940/ijeat.a4299.101312310.35940/ijese.K2586.12111024Sumith, Karthik K, V., & Dr. Sandhya S. (2024). Implementation of A Delay-Tolerant Routing Protocol in the Network Simulator NS-3. In International Journal of Emerging Science and Engineering (Vol. 12, Issue 11, pp. 13-17). DOI: https://doi.org/10.35940/ijese.k2586.1211102410.35940/ijrte.B2127.078219BS, S., Kumar B R, S., K, A., & S N, S. (2019). Routing Protocol using Fuzzy Logic for Vehicular Ad-Hoc Networks. In International Journal of Recent Technology and Engineering (IJRTE) (Vol. 8, Issue 2, pp. 4789-4794). DOI: https://doi.org/10.35940/ijrte.b2127.07821910.35940/ijaent.G9582.0610623Sharma, P. (2023). A Fuzzy Approach to Educational Grading Systems "Fuzzy Logic Based Grade Card." In International Journal of Advanced Engineering and Nano Technology (Vol. 10, Issue 6, pp. 1-8). DOI: https://doi.org/10.35940/ijaent.g9582.0610623