Optimization of Design Techniques by Reducing Power and Area of two Stage CMOS Operational Amplifier Employing Salp Swarm Algorithm
Telugu Maddileti1, S. Govindarajulu2, S. Chandra Mohan Reddy3
1Telugu Maddileti, Research Scholar, JNTUA, Anantha puramu.
2S. Govindarajulu, Professor in ECE Department, Dr. KVSRIT, Kurnool.
3S. Chandra Mohan Reddy, Associate Professor, ECE Department, JNTUACEP, Pulivendula.
Manuscript received on 02 June 2019 | Revised Manuscript received on 10 June 2019 | Manuscript published on 30 June 2019 | PP: 603-611 | Volume-8 Issue-8, June 2019 | Retrieval Number: H6742068819/19©BEIESP
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Abstract: Transistor dimension will directly impact the speed of circuit, energy utilization, area occupied by the circuit, and the latencyconditions. Engineers who are working in the area of analog circuit designing are provided with the responsibility of considering the large and small signal prototypes of circuit elements, with the view of satisfyingsomefunctional necessities, deriving the input characteristics of the elements with respect to the conditions for getting the output. Providing the Optimized procedure for designing the circuit for the purpose of selecting the proper size to the transistor frequentlywill be the time taking procedure, tiresome and repetitive physical procedurethatdepends onexpert’sknowledge. It is extremelynecessaryforcomputerizing the transistor dimension selection procedurein the direction that is having the capacity of quicklyformulate thegreater performance integrated circuit. Need for Establishing the easier but efficienttechnique for involuntarily determining the best characteristic values for circuit with the help of utilizing the associations in values resulting from the analog circuit design variables. In this paper a recently designed nature inspired meta heuristic technique by Mirjalail et al., because of the capacity of the concurrent handling of the various constraints and at the same time it can provide answers pertaining to optimization related problems of multi-objective in nature. This capability of the optimization techniques is exploited in the automated design optimization procedure. The performance analysis with the suggested technique is done with the suggested techniqueand the results are compared with the other standard techniques utilized in the automated design optimization of the analog IC and from the comparative results it is demonstrated that proposed SSA technique provides better results.
Keyword: Analog Integrated Circuit, Design Optimization,SALP SWARM OPTIMIZER, POWER DISSIPATION, CIRCUIT SIZING.
Scope of the Article: Operational Research.