Modified Counter Based Approach for Digital Watermarking of Sequential Circuits
Ankur Bhardwaj1, Shamim Akhter2
1Ankur Bhardwaj, Department of Electronics and Communication Engineering, Jaypee Institute of Information Technology, Noida, (U.P), India.
2Shamim Akhter, Department of Electronics and Communication Engineering, Jaypee Institute of Information Technology, Noida,(U.P), India.
Manuscript received on 02 June 2019 | Revised Manuscript received on 10 June 2019 | Manuscript published on 30 June 2019 | PP: 3409-3413 | Volume-8 Issue-8, June 2019 | Retrieval Number: G5336058719/19©BEIESP
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Abstract: Digital Watermarking techniques are applied on sequential circuits to track the misuse of Intellectual Property (IP) core of a design. Watermarking technique for sequential circuits was first proposed by Oliviera. The issue of duplicate states in the technique proposed by Oliviera was addressed by counter-based approach given by Siddhant. Counter based approach also had its demerits and it was not very practical. In this paper, an improved counter based watermarking technique have been proposed which eliminates the drawbacks of previous watermarking techniques. The synthesis and simulation of proposed techniques has been done using Xilinx ISE and ModelSim simulator respectively.
Keyword: Watermarking; Intellectual property; Sequential circuits; Counter.
Scope of the Article: Digital System and Logic Design.