Analysis of Combinational Circuits using Positive Feed Back Adiabatic Logic
T. Suguna1, M.Janaki Rani2
1T. Suguna, Research Scholar, Dr. M.G.R Educational & Research Institute University, Chennai-95, (Tamil Nadu), India.
2M. Janaki Rani, Professor, Dr. M.G.R Educational &Research Institute University, Chennai-95, (Tamil Nadu), India.
Manuscript received on 02 June 2019 | Revised Manuscript received on 10 June 2019 | Manuscript published on 30 June 2019 | PP: 3390-3399 | Volume-8 Issue-8, June 2019 | Retrieval Number: H7546068819/19©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: In low-power VLSI circuits, power optimization is required due to increased demand for handheld devices. Power optimization can be performed from process level to system level at different levels of abstraction. Adiabatic Logic is the promising area of research at device level in low power VLSI design, in which time varying power supply called power clock, is used to supply energy to Adiabatic Logic circuit and recover energy back to the power supply. Power clock generator (PCG) plays a major role in AL’s energy recovery and therefore in efficiency. In this paper, different logic styles like conventional CMOS, Gate Diffusion Input (GDI)and adiabatic logic (AL) are used for implementing combinational circuits like Full Adder, Multiplexer, Demultiplexer, Encoder and Decoder. All the circuits are implemented and simulated in TANNER EDA tool at 32nm technology. The parameters like power consumption, delay and area are compared for all the logic styles and observed that adiabatic logic saves power about 92% for multiplexer compared conventional CMOS logic and 87% compared to GDI technique. So, it is concluded that the applications where the power is main criteria, adiabatic logic can be approached.
Keyword: Adiabatic logic, GDI, conventional CMOS, power clock (PC), power, area, delay.
Scope of the Article: Nanometer-Scale Integrated Circuits.