Asic Design and Verification of Amba Apb Protocol using Uvm
K. Swetha Reddy1, Punna Soujanya2, D. Kanthi Sudha3

1K. Swetha Reddy, Assistant Professor, Vallurupalli Nageswara Rao Vignana Jyothi Institute of Engineering and Technology Hyderabad India.
2P. Soujanya, B.Tech. ECE, Memorial College of Engineering and Technology, Devarakonda, (Telangana), India.
3D. Kanthi Sudha, M.Tech Microwave Engineering from Acharya Nagarjuna University, (Andhra Pradesh), India.
Manuscript received on June 11, 2020. | Revised Manuscript received on June 25, 2020. | Manuscript published on July 10, 2020. | PP: 636-642 | Volume-9 Issue-9, July 2020 | Retrieval Number: 100.1/ijitee.I7257079920 | DOI: 10.35940/ijitee.I7257.079920
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Abstract: ASIC Implementation of AMBA APB convention with confirmation has been proposed right now. The structure presents Advanced Peripheral Bus Protocol (APB) in last part. To interface the peripherals, low data move capacity and low execution transport of APB is used. Henceforth, an altered ASIC plan with explicit less highlights, with better planning, low force necessity and less zone overhead, has been proposed. This plan is explicitly adept for advanced frameworks which have sequential transport interface necessity for on board correspondence. Additionally, the Firm IP centre of Master Controller has been intended for ASIC, which makes the structure exceptionally versatile on any ASIC chips or SOC plans. The whole custom ASIC execution of proposed configuration has been done in Synopsys Tool chain with 32nm standard cell library and this structure is verified utilizing Universal Verification Methodology (UVM). 
Keywords: AMBA family, SoC, UVM(Verification), ASIC Design.
Scope of the Article: Microstrip Antenna Design and Application