Implementation of Coordinate Rotation Algorithm for Hardware Multipliers
Swathi Gera1, M.Ashok Kumar2, K.V.Ramana Rao3
1Swathi Gera, ECE Department,JNTUK University, Pydah College of Engineering and Technology, Vskp, India.
2M.Ashok Kumar,Asst. Professor, ECE Department, JNTUK University, Pydah College of Engineering and Technology,  Vskp, India.
3K.V.Ramana Rao, ECE Department,JNTUK University, Pydah College of Engineering and Technology, Vskp, India.

Manuscript received on October 01, 2012. | Revised Manuscript received on October 05, 2012. | Manuscript published on October 10, 2012. | PP: 10-12 | Volume-1 Issue-5 October 2012. | Retrieval Number: E0277091512/2012©BEIESP
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Abstract: Most of the hardware algorithms exist to handle the hardware intensive signal processing problems. Among these algorithms is a set of shift-add algorithms collectively known as CORDIC for computing a wide range of functions including certain trigonometric, hyperbolic and logarithmic functions. Apart from this it can handle linear functions. Even though numerous articles covering various aspects of CORDIC algorithms, very few surveys concentrate on implementation in FPGAs. CORDIC (Coordinate Rotation Digital Computer) is an algorithm for computing transcendental functions like sine, cosine and arctangent. The method can also be easily extended to compute square roots as well as hyperbolic functions. The algorithm works by reducing the calculation into a number of micro-rotations for which the arctangent value is precomputed and loaded in a table. This method reduces the computation to addition, subtraction, compares, and shifts.Various digital architectures were proposed and compared, including low-cost sequential and high performance pipelined solutions. Fixed point and floating point arithmetic was considered. The concepts were implemented in VHDL, verified and synthesized with Xilinx tools. Selected approach was physically implemented and tested.  
Keywords: CORDIC, sine, cosine, FPGA, synthesis. SVD, digital, hardware, VHDL, FPGA