Tunneling Field Effect Transistors for Low Power Digital Systems
L.Megala1, B.Devanathan2, R.Venkatraman3, A.Vishnukumar4

1L.Megala, Assistant Professor, Department of ECE, V.R.S College of Engineering & Technology, Arasur, Villupuram (Tamil Nadu), India.
2B.Devanathan, Lecturer, Department of ECE, University College of Engineering, Kakuppam, Villupuram (Tamil Nadu), India.
3R.Venkatraman, Assistant Professor, Department of ECE, University College of Engineering, Tindivanam (Tamil Nadu), India.
4A.Vishnukumar, Assistant Professor, Department of I.T, Veltech Hightech Dr. Rangarajan Dr. Sakunthala Engineering College, Avadi, Chennai (Tamil Nadu), India.
Manuscript received on 15 April 2013 | Revised Manuscript received on 22 April 2013 | Manuscript Published on 30 April 2013 | PP: 296-299 | Volume-2 Issue-5, April 2013 | Retrieval Number: E0740042413/13©BEIESP
Open Access | Editorial and Publishing Policies | Cite | Mendeley | Indexing and Abstracting
© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: MOSFET transistors are commonly used in high speed integrated circuits, yield smaller and faster more functions at lower cost. Various problems exist with scaling of MOSFET devices i.e., short channel effects, drain induced barrier lowering, velocity saturation which limits the performance of MOSFETs. Scaling limitations of MOSFET devices leads to lower ON to OFF current ratio limited by 60mV/dec sub threshold slope. A new type of device called “Tunnel FET” is used to overcome these difficulties. TFET can beat 60mV/dec sub-threshold swing of MOSFETs. In tunnel FET carriers are generated by band-to-band tunneling and OFF current are low. This makes ideal for ultra low power digital systems. Tunnel FET have energy barrier in OFF state, which avoids power-consuming leakages. In this paper sub-threshold swing and low OFF current is simulated and its power is analyzed.
Keywords: Tunnel FET, Sub Threshold Swing, PIN Tunnel FET, PNPN Tunnel FET.

Scope of the Article: Low-power design