Recent Advancement in the Memristor Memory Development
Ravikumar K. I1, Sukumar R2
1Ravikumar K. I*, Pursuing Ph.D., Jain University, JGI Global Campus, Bengaluru, Karnataka, India.
2Sukumar R, Professor and Head of ECE , Jain University College of Engineering & Technology, JGI Global Campus, Bangalore, India
Manuscript received on April 20, 2020. | Revised Manuscript received on April 29, 2020. | Manuscript published on May 10, 2020. | PP: 98-107 | Volume-9 Issue-7, May 2020. | Retrieval Number: F4184049620/2020©BEIESP | DOI: 10.35940/ijitee.F4184.059720
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Meritor is a newly-created tool and because of its nanometer scale and different electrical properties it has received much interest from advanced electronics designers since it was discovered. The memory capacity of a memrist is one of the most significant features. In this paper, about 50 papers on designing of memristor, optimization rules for reducing power, area for storing the data into memristor and implemented the full adders using memristor using the Pspice simulator. The paper ultimately addresses the complex study lapses and obstacles in constructing the memorial that will enable scholars and thinkers lead to more analysis.
Keywords: Memristor, Optimization.
Scope of the Article: Discrete Optimization