FPGA Based Coin Recognition System
B. Murali Krishna1, M. Lakshmana Kumar2, M. Tanmayee3, Ch. Anantha Krishna4, P. Rahul Sai Charan5

1B. Murali Krishna, Assistant Professor, Department of ECE, KLEF, Vaddeswaram (A.P), India.
2M. Lakshmana Kumar, Assistant Professor, Department of ECE, KLEF, Vaddeswaram (A.P), India.
3M. Tanmayee, Department of ECE, KLEF, Vaddeswaram (A.P), India.
4Ch. Anantha Krishna, Department of ECE, KLEF, Vaddeswaram (A.P), India.
5P. Rahul Sai Charan, Department of ECE, KLEF, Vaddeswaram (A.P), India.

Manuscript received on 01 May 2019 | Revised Manuscript received on 15 May 2019 | Manuscript published on 30 May 2019 | PP: 1589-1594 | Volume-8 Issue-7, May 2019 | Retrieval Number: G6080058719/19©BEIESP
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Abstract: Coins are most widely used in regular day to day existence at different places like in banks, markets, general stores, weight machines, vending machines, and hundis in temples. People used to count the coins manually before the arrival of coin recognizing and counting systems. It takes a lot of time and may lead to errors. So, it is necessary to develop automatic coin recognition and counting systems. These systems are already available in other countries. Unlike other countries, it is difficult to detect coins in India due to variability in the coin features for same denomination. In this paper, an FPGA (Field Programmable Gate Array) based coin processing is done along with recognition and counting. OV7670 camera is interfaced with Basys 3 FPGA. A HDL code is developed for interfacing camera. The advantage of FPGA is that it provides high processing performance, flexibility and low development cost. Due to reconfigurable feature of FPGA, high resolution cameras like 2MP, 5MP can be interfaced to detect the objects with high resolution.
Keyword: Coin, FPGA, Image Processing, Verilog HDL.
Scope of the Article: Real-Time Information Systems.