Leakage Power Consumption of Address Register Interfacing with Different Families of FPGA
Bishwajeet Pandey1, Keshav Kumar2, Shabeer Ahmad3, Amit K Pandit4, Deepa Singh5, D M Akbar Hussain6

1Bishwajeet Pandey, Center of Energy Excellence, Gyancity Research Lab, Motihari, Bihar, India.

2Keshav Kumar, Chitkara University Institute of Engineering & Technology, Chitkara University, Punjab, India.

3Shabeer Ahmad, Gran Sasso Science Institute, L’Aquila, Italy.

4Amit K Pandit, The Shri Mata Vaishno Devi University, Katra, Jammu and kashmir India.

5Deepa Singh, ABV-IIITM, Gwalior,Madhya Pradesh, India.

6D M Akbar Hussain, Department of Energy Technology, Aalborg University, Esbjerg, Denmark.

Manuscript received on 20 August 2019 | Revised Manuscript received on 27 August 2019 | Manuscript Published on 31 August 2019 | PP: 512-514 | Volume-8 Issue-9S2 August 2019 | Retrieval Number: I11080789S219/19©BEIESP DOI: 10.35940/ijitee.I1108.0789S219

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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open-access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: In this paper, we are designing an address register which is sensitive towards rising in voltage. We analysed the power variation of address register on Xilinx 14.1 ISE Design Suite and the code of address register is written in Verilog hardware description language. In this paper, we have used two FPGA of two different families, one is of Virtex family which is Virtex 6 and the other is of Spartan family which is Spartan 6, to study the power consumption of address register. We have observed the different on chips power which are consumed by address register by varying the voltage from 0.75V to 2V for Virtex 6 FPGA and 0.75V to 3V for Spartan 6 FPGA and we observed that when we lower the voltage, lower will be the power consumption. At 2V, Virtex 6 FPGA stops working and the interface of address register with FPGA burns out. For Spartan 6 FPGA, the same happens at 3V voltage.

Keywords: Power variation, Xilinx, Verilog, Voltage Scaling, FPGA.
Scope of the Article: Renewable Energy Technology