Accelerator Design for Ethernet and HDMI IP Systems for IoT using Xilinx Vivado 18.X
Ipseeta Nanda1, Nibedita Adhikari2
1Ipseeta Nanda, Assistant Professor, CAPGS, Biju Patnaik University of Technology, Rourkela, Odisha, India.
2Nibedita Adhikari, Deputy Director Examination , Biju Patnaik University of Technology, Rourkela, Odisha, India..
Manuscript received on 02 July 2019 | Revised Manuscript received on 05 July 2019 | Manuscript published on 30 August 2019 | PP: 652-656 | Volume-8 Issue-10, August 2019 | Retrieval Number: J87860881019/2019©BEIESP | DOI: 10.35940/ijitee.J8786.0881019
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Xilinx Vivado software is used for designing synthesis and implementation of accelerator. The objective of this paper is to understand the concept of intellectual property (IP), IP reuse, custom IP and IP subsystem and to design the subsystem using Xilinx Vivado is used. This paper attempts to design accelerator to make communication possible between High Definition Multimedia Interface (HDMI) and Ethernet for Internet of Things (IoT) using Xilinx Vivado 18.X . The term is increasingly being also defined as objects that “talk” to each other rather in the manner of Internet of Learning Things (IoLT) based IoT to define objects with that of “realistically talk” to each other, given the rising system external & internal environmental complexity and uncertainty factors facing the objects. Keywords: IP, IoT, HDMI, IoLT
Scope of the Article: IoT