A 1000 Mhz Low Power and High Speed 8-Bit Flash ADC Architecture using 90nm Cmos Technology
Deepa Jose1, Tamilselvi. S2, P. Nirmal Kumar3

1Dr. Deepa Jose, Associate Professor, Department of ECE, KCG College of Technology, Chennai (Tamil Nadu), India. 

2Ms. Tamilselvi. S, M.E. VLSI Design, Department of ECE, CEG, Anna University, Chennai (Tamil Nadu), India. 

3Dr. P. Nirmal Kumar, Professor, Department of ECE, CEG, Anna University, Chennai (Tamil Nadu), India. 

Manuscript received on 08 September 2019 | Revised Manuscript received on 17 September 2019 | Manuscript Published on 11 October 2019 | PP: 11-19 | Volume-8 Issue-11S September 2019 | Retrieval Number: K100309811S19/2019©BEIESP | DOI: 10.35940/ijitee.K1003.09811S19

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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open-access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: The design objective is to implement a Low power, High speed and High resolution Flash ADC with increased sampling rate. To make this possible the blocks of ADC are analyzed. The resistive ladder, comparator block, encoder block are the major modules of flash ADC. Firstly, the comparator block is designed so that it consumes low power. A NMOS latch based, PMOS LATCH based and a Strong ARM Latch based comparators were designed separately. A comparative analysis is made with the comparator designs. Comparators in the design is reduced to half by using time domain interpolation. Then a reference subtraction block is designed to generate the subtraction value of voltages easily and its given as input to comparator. Then a more efficient and low power consuming fat tree encoder is designed. Once all the blocks were ready, a 8 bit Flash Analog to Digital Converter was designed using 90nm CMOS technology and all the parameters such as sampling rate, power consumption, resolution were obtained and compared with other works.

Keywords: Low Power High Speed Architecture Technology Design Analysis.
Scope of the Article: Low-power design