Design of Low Power, High Speed Differential Amplifier Ring Voltage Controlled Oscillator in CMOS Technology
Fahmida Khatoon1, Tarana Afrin Chandel2

1Ms. Fahmida Khatoon, M.Tech, Department of Electronics & Communication Engineering, Integral University, Lucknow (U.P), India.
2Ms. Tarana Afrin Chandel, Jr Associate Professor, Department of Electronics & Communication Engineering, Integral University, Lucknow (U.P), India.
Manuscript received on 10 May 2014 | Revised Manuscript received on 20 May 2014 | Manuscript Published on 30 May 2014 | PP: 34-37 | Volume-3 Issue-12, May 2014 | Retrieval Number: L16500531214/14©BEIESP
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Abstract: Designing a compact, power efficient Voltage Controlled Oscillator (VCO) for high frequency phase lock loop (PLL) in modern wireless communication system is decisively a challenging task. Voltage-Controlled Ring Oscillator are crucial component in many wireless communication systems.VCRO is used in PLL circuit, to generate the oscillations and increase the speed of whole system. In this paper a low power and high speed VCRO is implemented using 250nm CMOS technology provided by generic with 2.5volt power supply. In favour of easy implementation of the module in small die size, a five-stage CMOS differential Voltage Controlled Ring Oscillator has been adopted to fabricate the proposed VCRO.The Voltage Controlled Ring Oscillator is design in Tanner Tool Version 13 environment. Power Consumption should be reduced to improve the performance of the VCRO.We also used of several techniques such as transistor sizing to improve performance of VCRO.Simulated results show that the designed VCRO exhibits an output frequency from 87-910 MHz with tuning voltages of 0.7 V to 2.3 V.The VCRO consumes 0.359mW of power at Vtune=0.7 V supply.
Keywords: CMOS, High Speed, Low Power, VCRO

Scope of the Article: Low-power design