Implementation of full Adder with 2×1 Mux using Optimised Gdi Technique
K. Prasanna Kumar1, V. Venkata Prudhvi2, P. Sree Poojya3, N. Sai Soumith4

1K. Prasanna Kumar*, Department of Electronics and communication Engineering, KLEF, Vaddeswaram, India.
2V. Venkata Prudhvi, Department of Electronics and Communication Engineering, KLEF, Vaddeswaram, India.
3P. Sree Poojya, Department of Electronics and Communication Engineering, KLEF, Vaddeswaram, India.
3N. Sai Soumith., , Department of Electronics and Communication Engineering, KLEF, Vaddeswaram, India. 

Manuscript received on November 13, 2019. | Revised Manuscript received on 22 November, 2019. | Manuscript published on December 10, 2019. | PP: 4184-4189 | Volume-9 Issue-2, December 2019. | Retrieval Number: B6587129219/2019©BEIESP | DOI: 10.35940/ijitee.B6587.129219
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Abstract: The major considerations of any digital circuit are area and power consumption. GDI (Gate Diffusion Input) – an advanced technique is proposed for designing a circuit in order to reach the requirements, reduce power consumption, and effective utilization of area. Despite having many uses, the GDI technique is noted for some drawbacks. The principle point of this paper is to concentrate on the downsides of the existing GDI technique and to propose an improved version of GDI technique to withstand the disadvantages of the earlier one. A full adder with 2×1 MUX is designed using conventional techniques and compared their simulation results with full adder using optimized GDI technique. Simulation and analysis of the full adder are carried out using CADENCE tool at 45nm technology. Simulation results proved that the proposed design had improved the performance of GDI and reduces almost less than 50% of layout area and power consumption is only 1.5% of the power consumed using conventional technique. 
Keywords: Drawbacks of GDI, GDI, Layout Area, Low Power Consumption.
Scope of the Article: Communication Engineering