Impact of Negative Capacitance Junctionless Nanowire (NCJLNW) MOSFET on Ring Oscillator Design and Analysis
Manish Kumar Rai1, Sanjeev Rai2

1Manish Kumar Rai, Department of Electronics & Telecommunication Engineering, G. H. Raisoni College of Engineering & Management, Pune (M.H), India.
2Sanjeev Rai, Department of Electronics & Communication Engineering, Motilal Nehru National Institute of Technology Allahabad, Prayagraj (U.P), India.
Manuscript received on 10 February 2023 | Revised Manuscript received on 18 February 2023 | Manuscript Accepted on 15 March 2023 | Manuscript published on 30 March 2023 | PP: 1-7 | Volume-12 Issue-4, March 2023 | Retrieval Number: 100.1/ijitee.D94640312423 | DOI: 10.35940/ijitee.D9464.0312423

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Abstract: This work presents the analysis of NCJLNW for low power analog/RF applications; this device shows reduced power consumption, reduced SCEs, smaller leakage and higher Ion/Ioff ratio. The results indicate that the proposed device improves the intrinsic gain, cut-off frequency, transconductance and reduces DIBL. The analysis of band-energy, surface-potential and electric-field has also shown promising results. Ring oscillator has been designed using this device; the analysis of the oscillator presents lower voltage of operation resulting into reduced power consumption, and high noise immunity. The frequency of oscillation is found to be higher at 172.1 GHz at a channel length of 20 nm. 
Keywords: Drain Induced Barrier Lowering (DIBL), Ferroelectric, Negative capacitance Junction less Nanowire (NCJLNW), Short Channel Effect (SCE).
Scope of the Article: Design and Diagnosis