Design of Energy Efficient Control Unit and Implementation on High Performance FPGA
Keshav Kumar1, Bishwajeet Pandey2, D. M. Akbar Hussian3, Arifa Bhutto4, Amit Kant Pandit5, Yousef A. Baker El-Ebiary6

1Keshav Kumar, Gyancity Research Consultancy, Motihari (Bihar), India.

2Bishwajeet Pandey, Gyancity Research Consultancy, Motihari (Bihar), India.

3D. M. Akbar Hussian, Aalborg University, Esbjerg, Denmark.

4Arifa Bhutto, University of Sindh, Jamshoro, Pakistan.

5Amit Kant Pandit, Shri Mata Vaishno Devi University (SMVDU), Katra, Jammu and Kashmir, India.

6Yousef A. Baker El-Ebiary, Faculty of Informatics and Computing, UniSZA, Malaysia.

Manuscript received on 06 December 2019 | Revised Manuscript received on 20 December 2019 | Manuscript Published on 31 December 2019 | PP: 23-26 | Volume-8 Issue-12S2 October 2019 | Retrieval Number: L100510812S219/2019©BEIESP | DOI: 10.35940/ijitee.L1005.10812S219

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Abstract: With the crisis of power across the globe, green communication and power-efficient devices are getting more and more attention. This work emphasis about the implementation of Control Unit (CU) circuit on FPGA kit. In this project, power consumption of CU circuit is analyzed by changing the different Input/Output (I/O) standards of FPGA. This project is implemented on Xilinx 14.1 tool and the power consumption on CU is calculated with X Power Analyzer tool on 28-Nano-Meter (nm) Artix-7 Field Programmable Gate Array (FPGA). Out of different I/O standards, CU circuit is most power efficient with LVCMOS I/O standard on Artix-7 FPGA.

Keywords: Control Unit, I/O Standard, Low Power, LVCMOS, FPGA.
Scope of the Article: FPGAs